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features ? compliant with speci cations for ieee- 802.3z gigabit ethernet ? industry standard mezzanine height 1 x 9 package style with integral duplex sc connector ? afbr-53d5z performance: 220 m with 62.5/125 ? m mmf ? iec 60825-1 class 1/cdrh class i laser eye safe ? single +5 v power supply operation with pecl logic interfaces ? wave solder and aqueous wash process compatible ? rohs compliance applications ? switch to switch interface ? switched backbone applications ? high speed interface for file servers ? high performance desktops related products ? physical layer ics available for optical or copper in- terface (hdmp-1636a/1646a) ? versions of this transceiver module also available for fibre channel (afbr-53d3z) ? gigabit interface converters (gbic) for gigabit ethernet (cx, sx,) description the afbr-53d5z transceiver from avago technologies allows the system designer to implement a range of solutions for multimode gigabit ethernet applications. the overall avago technologies transceiver product consists of three sections: the transmitter and receiver optical subassemblies, an electrical subassembly, and the package housing which incorporates a duplex sc connector receptacle. transmitter section the transmitter section of the afbr-53d5z consists of an 850 nm vertical cavity surface emitting laser (vc- sel) in an optical subassembly (osa), which mates to the ber cable. receiver section the receiver of the afbr-53d5z includes a silicon pin photodiode mounted together with a custom, silicon bipolar transimpedance preampli er ic in an osa. this osa is mated to a custom silicon bipolar circuit that provides post-ampli cation and quantization. the post-ampli er also includes a signal detect circuit which provides a pecl logic-high output upon detec- tion of a usable input optical signal level. this singleen- ded pecl output is designed to drive a standard pecl input through a 50 pecl load. afbr-53d5z family 850 nm vcsel, 1 x 9 fibre optic transceivers for gigabit ethernet data sheet
2 package and handling instructions flammability the afbr-53d5z transceiver housing is made of high strength, heat resistant, chemically resistant, and ul 94v-0 ame retardant plastic. recommended solder and wash process the afbr-53d5z is compatible with industry standard wave or hand solder processes. process plug this transceiver is supplied with a process plug (hfbr- 5000) for protection of the optical ports within the duplex sc connector receptacle. this process plug pre- vents contamination during wave solder and aqueous rinse as well as during handling, shipping and storage. it is made of a hightemperature, molded sealing mate- rial that can withstand 80c and a rinse pressure of 110 lbs per square inch. recommended solder uxes used with the afbr-53d5z should be water-soluble, organic uxes. recommended solder fluxes include lonco 3355-11 from london chemical west, inc. of burbank, ca, and 100 flux from alpha-metals of jersey city, nj. recommended cleaning/degreasing chemicals alcohols: methyl, isopropyl, isobutyl. aliphatics: hexane, heptane other: soap solution, naph- tha. do not use partially halogenated hydrocarbons such as 1,1.1 trichloroethane, ketones such as mek, acetone, chloroform, ethyl acetate, methylene dichloride, phe- nol, methylene chloride, or n-methylpyrolldone. also, hp does not recommend the use of cleaners that use halogenated hydrocarbons because of their potential environmental harm. regulatory compliance (see the regulatory compliance table for transceiver performance) the overall equipment design will determine the certi - cation level. the transceiver performance is o ered as a gure of merit to assist the designer in considering their use in equipment designs. electrostatic discharge (esd) there are two design cases in which immunity to esd damage is important. the rst case is during handling of the transceiver prior to mounting it on the circuit board. it is important to use normal esd handling precautions for esd sensitive devices. these precautions include us- ing grounded wrist straps, work benches, and oor mats in esd controlled areas. the transceiver performance has been shown to provide adequate performance in typical industry production environments. the second case to consider is static discharges to the exterior of the equipment chassis containing the trans- ceiver parts. to the extent that the duplex sc connector receptacle is exposed to the outside of the equipment chassis it may be subject to whatever system-level esd test criteria that the equipment is intended to meet. the transceiver performance is more robust than typical in- dustry equipment requirements of today. electromagnetic interference (emi) most equipment designs utilizing these high-speed transceivers from avago technologies will be required to meet the requirements of fcc in the united states, cenelec en55022 (cispr 22) in europe and vcci in ja- pan. refer to emi section (page 5) for more details. immunity equipment utilizing these transceivers will be subject to radio-frequency electromagnetic elds in some en- vironments. these transceivers have good immunity to such elds due to their shielded design.
3 caution: there are no user serviceable parts nor any mainte- nance required for the afbr-53d5z. all adjustments are made at the factory before shipment to our customers. tampering with or modifying the performance of the afbr-53d5z will result in voided product warranty. it may also result in improper operation of the afbr- 53d5z circuitry, and possible overstress of the laser source. device degradation or product failure may re- sult. connection of the afbr-53d5z to a nonapproved opti- cal source, operating above the recommended absolute maximum conditions or operating the afbr-53d5z in a manner inconsistent with its design and function may result in hazardous radiation exposure and may be con- sidered an act of modifying or manufacturing a laser product. the person(s) performing such an act is re- quired by law to recertify and reidentify the laser prod- uct under the provisions of u.s. 21 cfr (subchapter j). regulatory compliance feature test method performance electrostatic discharge (esd) to the electrical pins mil-std-883c method 3015.4 class 1 (>2000v). electrostatic discharge (esd) to the duplex sc receptacle variation of iec 801-2 typically withstand at least 15 kv without damage when the duplex sc connector receptacle is contacted by a human body model probe. electromagnetic interference (emi) fcc class b cenelec en55022 class b (cispr 22a) vcci class i margins are dependent on customer board and chassis designs. immunity variation of iec 61000-4-3 typically show no measurable e ect from a 10 v/m eld swept from 27 to 1000 mhz applied to the transceiver without a chassis enclosure. laser eye safety and equipment type testing us 21 cfr, subchapter j per para- graphs 1002.10 and 1002.12 en60950-2000 en60825-1:1994+a1:2002+a2:2001 en60825-2:2000 ael class i, fda/cdrh afbr-53d5z accenssion #9720151-53 ael class 1, tuv rheinland of north america afbr-53d5z certi cate #09771047.028 protection class iii component recognition underwriters laboratories and ca- nadian standards association joint component recognition for informa- tion technology equipment including electrical business equipment. ul file e173874 eye safety these laser-based transceivers are classi ed as ael class i (u.s. 21 cfr(j) and ael class 1 per en 60825-1 (+a11). they are eye safe when used within the data sheet lim- its per cdrh. they are also eye safe under normal op- erating conditions and under all reasonably forseeable single fault conditions per en60825-1. avago technolo- gies has tested the transceiver design for compliance with the requirements listed below under normal op- erating conditions and under single fault conditions where applicable. tuv rheinland has granted certi- ca- tion to these transceivers for laser eye safety and use in en 60950 and en 60825-2 applications. their perfor- mance enables the transceivers to be used without con- cern for eye safety up to 7 volts transmitter vcc.
4 application support optical power budget and link penalties the worst-case optical power budget (opb) in db for a beroptic link is determined by the di erence between the minimum transmitter output optical power (dbm avg) and the lowest receiver sensitivity (dbm avg). this opb provides the necessary optical signal range to es- tablish a working ber-optic link. the opb is allocated for the ber-optic cable length and the corresponding link penalties. for proper link performance, all penalties that a ect the link performance must be accounted for within the link optical power budget. the gigabit eth- ernet ieee 802.3z standard identi es, and has modeled, the contributions of these opb penalties to establish the link length requirements for 62.5/125 ? m and 50/125 ? m multimode ber usage. refer to the ieee 802.3z standard and its supplemental documents that develop the mod- el, empirical results and nal speci cations. data line interconnections avago technologies afbr-53d5z ber-optic transceiver is designed to directly couple to +5 v pecl signals. the transmitter inputs are internally dc-coupled to the laser driver circuit from the transmitter input pins (pins 7, 8). there is no internal, capacitively-coupled 50 ohm termination resistance within the transmitter input section. the transmitter driver circuit for the laser light source is a dc-coupled circuit. this circuit regulates the output optical power. the regulated light output will maintain a constant output optical power provided the data pattern is reasonably balanced in duty factor. if the data duty factor has long, continuous state times (low or high data duty factor), then the output optical power will gradually change its average output optical power level to its pre-set value. as for the receiver sec- tion, it is internally ac-coupled between the pre-ampli- er and the postampli er stages. the actual data and data-bar outputs of the postampli er are dc-coupled to their respective output pins (pins 2, 3). signal detect is a single-ended, +5 v pecl output signal that is dc- coupled to pin 4 of the module. signal detect should not be ac-coupled externally to the follow-on circuits because of its infrequent state changes. caution should be taken to account for the proper interconnection be- tween the supporting physical layer integrated circuits and this afbr-53d5z transceiver. figure 3 illustrates a recommended interface circuit for interconnecting to a +5 vdc pecl ber-optic transceiver. some ber-optic transceiver suppliers modules include internal capacitors, with or without 50 ohm termina- tion, to couple their data and data-bar lines to the i/o pins of their module. when designing to use these type of transceivers along with avago technologies transceivers, it is important that the interface circuit can accommodate either internal or external capacitive cou- pling with 50 ohm termination components for proper operation of both transceiver designs. the internal dc- coupled design of the afbr-53d5z i/o connections was done to provide the designer with the most exibility for interfacing to various types of circuits. eye safety circuit for an optical transmitter device to be eye-safe in the event of a single fault failure, the transmitter must either maintain normal, eye-safe operation or be disabled. in the afbr-53d5z there are three key elements to the laser driver safety circuitry: a monitor diode, a window detector circuit, and direct control of the laser bias. the window detection circuit monitors the average optical power using the monitor diode. if a fault occurs such that the transmitter dc regulation circuit cannot maintain the preset bias conditions for the laser emitter within 20%, the transmitter will automatically be dis- abled. once this has occurred, only an electrical power reset will allow an attempted turn-on of the transmitter.
5 signal detect the signal detect circuit provides a deasserted output signal that implies the link is open or the transmitter is off as de ned by the gigabit ethernet speci cation ieee 802.3z, table 38.1. the signal detect threshold is set to transition from a high to low state between the minimum receiver input optional power and C30 dbm avg. input optical power indicating a definite opti- cal fault (e.g. unplugged connector for the receiver or transmitter, broken ber, or failed far-end transmitter or data source). a signal detect indicating a working link is functional when receiving encoded 8b/10b characters. the signal detect does not detect receiver data error or error-rate. data errors are determined by signal process- ing following the transceiver. electromagnetic interference (emi) one of a circuit board designers foremost concerns is the control of electromagnetic emissions from electron- ic equipment. success in controlling generated elec- tromagnetic interference (emi) enables the designer to pass a governmental agencys emi regulatory standard; and more importantly, it reduces the possibility of inter- ference to neighboring equipment. there are three op- tions available for the afbr-53d5z with regard to emi shielding which provide the designer with a means to achieve good emi performance. the emi performance of an enclosure using these transceivers is dependent on the chassis design. avago technologies encourages using standard rf suppression practices and avoiding poorly emi-sealed enclosures. the rst con guration is a standard afbr-53d5z ber- optic transceiver that has no external emi shield. this unit is for applications where emi is either not an issue for the designer, or the unit resides completely inside a shielded enclosure, or the module is used in low den- sity, extremely quiet applications. the second con guration, option e, is for emi shielding applications where the position of the transceiver mod- ule will extend outside the equipment enclosure. the external metal shield of the transceiver helps locally to terminate em elds to the chassis to prevent their emis- sions outside the enclosure. this metal shield contacts the panel or enclosure on the inside of the aperture on all but the bottom side of the shield and provides a good rf connection to the panel. this option can ac- commodate various panel or enclosure thickness, i.e., .04 in. min. to 0.10 in. max. the reference plane for this panel thickness variation is from the front surface of the panel or enclosure. the recommended length for pro- truding the AFBR-53D5EZ transceiver beyond the front surface of the panel or enclosure is 0.25 in. with this op- tion, there is exibility of positioning the module to t the speci c need of the enclosure design. (see figure 6 for the mechanical drawing dimensions of this shield.) the third con guration, option f, is for applications that are designed to have a ush mounting of the module with respect to the front of the panel or enclosure. the ush-mount design accommodates a large variety of panel thickness, i.e., 0.04 in. min. to 0.10 in. max. note the reference plane for the ush-mount design is the in- terior side of the panel or enclosure. the recommended distance from the centerline of the transceiver front solder posts to the inside wall of the panel is 0.55 in. this option contacts the inside panel or enclosure wall on all four sides of this metal shield. see figure 8 for the mechanical drawing dimensions of this shield. the two designs are comparable in their shielding ef- fectiveness. both design options connect only to the equipment chassis and not to the signal or logic ground of the circuit board within the equipment closure. the front panel aperture dimensions are recommended in figures 7 and 9. when layout of the printed circuit board is done to incorporate these metal-shielded transceivers, keep the area on the printed circuit board directly under the metal shield free of any components and circuit board traces. for additional emi performance advantage, use duplex sc ber-optic connectors that have low metal content inside them. this lowers the ability of the metal ber-optic connectors to couple emi out through the aperture of the panel or enclosure.
6 notes: 1. the transceiver is class 1 eye-safe up to vcc = 7 v. 2. this is the maximum voltage that can be applied across the di erential transmitter data inputs without damaging the input circuit. 3. case temperature measurement referenced to the center-top of the internal metal transmitter shield. 4. tested with a 50 mvpCp sinusoidal signal in the frequency range from 500 hz to 1500 khz on the vcc supply with the recommend ed power supply lter in place. typically less than a 0.25 db change in sensitivity is experienced. 5. compatible with 10 k, 10 kh, and 100 k ecl and pecl input signals. 6. the outputs are terminated to vcc C2 v. 7. aqueous wash pressure < 110 psi. absolute maximum ratings recommended operating conditions process compatibility parameter symbol min. typ. max. unit reference storage temperature t s -40 100 c supply voltage v cc -0.5 7.0 v 1 data input voltage v i -0.5 v cc v transmitter di erential input village v d 1.6 v 2 output current i d 50 ma relative humidity rh 5 95 % parameter symbol min. typ. max. unit reference ambient operating temperature t a 070c case temperature t c 90 c 3 supply voltage v cc 4.75 5.25 v power supply rejection psr 50 mv p-p 4 transmitter data input voltage - low v il -v cc -1.810 -1.475 v 5 transmitter data input voltage - high v ih -v cc -1.165 -0.880 v 5 transmitter di erential input voltage v d 0.3 1.6 v data output load r dl 50 w 6 signal detect output load r sdl 50 w 6 parameter symbol min. typ. max. unit reference hand lead soldering temperature /time t sold / t sold 260/10 c/sec. wave soldering and aqueous wash t sold / t sold 260/10 c/sec. 7 evaluation kit to help you in your preliminary transceiver evaluation, avago technologies o ers a 1250 mbd gigabit ethernet evaluation board (part # hfbr-0535). this board allows testing of the ber-optic vcsel transceiver. it includes the afbr-53d5z transceiver, test board, and application instructions. in addition, a complementary evaluation board is available for the hdmp-1636a 1250 mbd giga- bit ethernet serializer/ deserializer (serdes) ic. (part # hdmp-163k) please contact your local field sales repre- sentative for ordering details.
7 transmitter electrical characteristics (ta = 0c to +70c, vcc = 4.75 v to 5.25 v) notes: 1. the laser reset voltage is the voltage level below which the vcct voltage must be lowered to cause the laser driver circuit to reset from an electrical/optical shutdown condition to a proper electrical/optical operating condition. the maximum value corresponds to the worst-case highest vcc voltage necessary to cause a reset condition to occur. the laser safety shutdown circuit will operate properly with transmitter vcc levels of 3.5 vdc vcc 7.0 vdc. 2. power dissipation value is the power dissipated in the receiver itself. it is calculated as the sum of the products of vcc a nd icc minus the sum of the products of the output voltages and currents. 3. these outputs are compatible with 10 k, 10 kh, and 100 k ecl and pecl inputs. 4. these are 20-80% values. receiver electrical characteristics (ta = 0c to +70c, vcc = 4.75 v to 5.25 v) parameter symbol min. typ. max. unit reference supply current i cct 85 120 ma power dissipation p dist 0.45 0.63 w data input current - low i il -350 0 ma data input current - high i ih 16 350 ma laser reset voltage v cct-reset 2.7 2.5 v 1 parameter symbol min. typ. max. unit reference supply current i ccr 105 130 ma power dissipation p disr 0.53 0.63 w 2 data output voltage - low v ol - v cc -1.950 -1.620 v 3 data output voltage - high v oh - v cc -1.045 -0.740 v 3 data output rise time t t 0.40 ns 4 data output fall time t f 0.40 ns 4 signal detect output voltage - low v ol - v cc -1.950 -1.620 v 3 signal detect output voltage - high v oh - v cc -1.045 -0.740 v 3
8 notes: 1. the maximum optical output power complies with the ieee 802.3z speci cation, and is class 1 laser eye safe. 2. optical extinction ratio is de ned as the ratio of the average output optical power of the transmitter in the high (1) state to the low (0) state. the transmitter is driven with a gigabit ethernet 1250 mbd 8b/10b encoded serial data pattern. this optical extinction r atio is ex- pressed in decibels (db) by the relationship 10log(phigh avg/plow avg). 3. these are un ltered 20-80% values. 4. laser transmitter pulse response characteristics are speci ed by an eye diagram (figure 1). the characteristics include rise time, fall time, pulse overshoot, pulse undershoot, and ringing, all of which are controlled to prevent excessive degradation of the receiver se nsitivity. these parameters are speci ed by the referenced gigabit ethernet eye diagram using the required lter. the output optical waveform complies with the requirements of the eye mask discussed in section 38.6.5 and fig. 38-2 of ieee 802.3z. 5. cpr is measured in accordance with eia/tia-526-14a as referenced in 802.3z, section 38.6.10. 6. tp refers to the compliance point speci ed in 802.3z, section 38.2.1. 7. the receive sensitivity is measured using a worst case extinction ratio penalty while sampling at the center of the eye. 8. the stressed receiver sensitivity is measured using the conformance test signal de ned in 802.3z, section 38.6.11. the conformance test sig- nal is conditioned by applying deterministic jitter and intersymbol interference. 9. the stressed receiver jitter is measured using the conformance test signal de ned in 802.3z, section 38.6.11 and set to an average optical power 0.5 db greater than the speci ed stressed receiver sensitivity. 10. the 3 db electrical bandwidth of the receiver is measured using the technique outlined in 802.3z, section 38.6.12. 11. return loss is de ned as the minimum attenuation (db) of received optical power for energy re ected back into the optical ber. receiver optical characteristics (ta = 0c to +70c, vcc = 4.75 v to 5.25 v) transmitter optical characteristics (ta = 0c to +70c, vcc = 4.75 v to 5.25 v) parameter symbol min. typ. max. unit reference output optical power 50/125 mm, na = 0.20 fiber p out -9.5 -4 dbm avg. 1 output optical power 62.5/125 mm, na = 0.275 fiber p out -9.5 -4 dbm avg. 1 optical extinction ratio 9 db 2 center wavelength l c 830 850 860 nm spectral width - rms s 0.85 nm rms optical rise / fall time t t /t f 0.26 ns 3, 4, fig. 1 rin 12 -117 db/hz coupled power ratio cpr 9 db 5 total transmitter jitter added at tp2 227 ps 6 parameter symbol min. typ. max. unit reference input optical power p im -17 0 dbm avg. 7 stressed receiver sensitivity 62.5 ? m 50 ? m - 12.5 - 13.5 dbm avg. dbm avg. 8 8 stressed receiver eye opening at tp4 201 ps 6, 9 receiver electrical 3db upper cuto frequency 1500 mhz 10 operating center wavelength ? c 770 860 nm return loss 12 db 11 signal detect - asserted pa -18 dbm avg. signal detect - deasserted pd -30 dbm avg. signal detect - hysteresis pa - pd 15 db
9 figure 1. transmitter optical eye diagram mask. table 1. pinout table figure 2. pin-out. 0.8 0.5 0.2 0 0.22 0.375 0.78 normalized time -0.2 normalized amplitude 1.0 1.0 0 1.3 0.625 1 = v eer 2 = rd+ 3 = rd- 4 = sd 5 = v ccr 6 = v cct 7 = td- 8 = td+ 9 = v eet top view nic nic nic = no internal connection (mounting pins) rx tx pin symbol functional description mounting pins the mounting pins are provided for transceiver mechanical attachment to the circuit board. they are embedded in the nonconductive plastic housing and are not connected to the trans- ceiver internal circuit. they should be soldered into plated-through holes on the printed circuit board. 1v eer receiver signal ground directly connect this pin to receiver signal ground plane. (for afbr-53d5z, v eer = v eet ) 2 rd+ receiver data out rd+ is an open-emitter output circuit. terminate this high-speed di erential pecl output with standard pecl techniques at the follow-on device input pin. 3 rd- receiver data out bar rd- is an open-emitter output circuit. terminate this high-speed di erential pecl output with standard pecl techniques at the follow-on device input pin. 4 sd signal detect normal optical input levels to the receiver result in a logic 1 output, v oh , asserted. low input optical levels to the receiver result in a fault condition indicated by a logic 0 output v oh , deasserted. signal detect is a single-ended pecl output. sd can be terminated with standard pecl tech- niques via 50 w to v ccr - 2v. alternatively, sd can be loaded with a 270w resistor to v eer to conserve electrical power with small compromise to signal quality. if signal detect output is not used, leave it open-circuited. this signal detect output can be used to drive a pecl input on an upstream circuit, such as, signal detect input pr loss of signal-bar. 5v ccr receiver power supply provide +5 vdc via the recommended receiver power supply lter circuit. locate the power supply lter circuit as close as possible to the v ccr pin. 6v cct transmitter power supply provide +5 vdc via the recommended transmitter power supply lter circuit. locate the power supply lter circuit as close as possible to the v cct pin. 7 td- transmitter data in-bar terminate this high-speed di erential pecl input with standard pecl techniques at the trans- mitter input pin. 8 td+ transmitter data in terminate this high-speed di erential pecl input with standard pecl techniques at the trans- mitter input pin. 9v eet transmitter signal ground directly connect this pin to the transmitter signal ground plane.
10 figure 3. recommended gigabit/sec ethernet afbr-53d5z fiber-optic transceiver and hdmp-1636a/1646a serdes integrated circuit tr ansceiver interface and power supply filter circuits. 9 8 7 6 5 4 3 1 pecl input output driver clock synthesis circuit parallel to serial circuit laser driver circuit input buffer clock recovery circuit serial to parallel circuit pre- amplifier post- amplifier signal detect circuit r10 270 to signal detect (sd) input at upper-level-ic r11 270 50 r9 270 r14 100 c12 0.01 f c11 0.01 f 2 c4 10 f c3 0.1 f 5 vdc c2 0.1 f c1 0.1 f c8* 10 f* l2 1 h l1 1 h c10 0.01 f c9 0.01 f c5 0.1 f r1 191 r4 191 r3 68 r2 68 5 vdc r13 150 r12 150 50 50 50 + + + 3.3 vdc gnd td+ td- rd- rd+ td+ td- rd- rd+ sd v ccr v cct v eet v eer afbr-53d5z fiber-optic transceiver hdmp-1636a/-1646a serial/de-serializer (serdes - 10 bit transceiver) notes: *c8 is an optional bypass capacitor for additional low-frequency noise filtering. use surface-mount components for optimum high-frequency performance. use 50 microstrip or stripline for signal paths. locate 50 terminations at the inputs of receiving units. v cc2 v ee2 see hdmp-1636a/-1646a data sheet for details about this transceiver ic. figure 4. recommended board layout hole pattern. (8x) 2.54 0.100 20.32 0.800 20.32 0.800 1.9 0.1 0.075 0.004 (2x) ? ? 0.000 m a 0.8 0.1 0.032 0.004 (9x) ? ? 0.000 m a -a- top view
11 figure 5. package outline drawing for afbr-53d5z. 39.6 (1.56) max. area reserved for process plug 12.7 (0.50) 25.4 (1.00) max. 12.7 (0.50) 20.32 (0.800) 20.32 (0.800) dimensions are in millimeters (inches). all dimensions are 0.025 mm unless otherwise specified. 9.8 (0.386) max. +0.1 -0.05 0.25 +0.004 -0.002 ( 0.010 3.3 0.38 (0.130 0.015) 8x ) 20.32 (0.800) 2.5 (0.10) slot depth xxxx-xxxx zzzzz laser prod 21cfr(j) class 1 country of origin yyww tx rx slot width 4.7 (0.185) 23.8 (0.937) +0.25 -0.05 0.46 +0.010 -0.002 ( 0.018 ) 9x ? 1.3 (0.051) 2x ? 15.8 0.15 (0.622 0.006) +0.25 -0.05 1.27 +0.010 -0.002 ( 0.050 ) 2x ? 2.0 0.1 (0.079 0.004) key: yyww = date code for multimode module: xxxx-xxxx = afbr-53xx zzzz = 850 nm 0.51 (0.020) 2.54 (0.100) a a
12 figure 6. package outline for AFBR-53D5EZ. 39.6 (1.56) max. area reserved for process plug 12.7 (0.50) 25.4 (1.00) max. 12.7 (0.50) 20.32 (0.800) 20.32 (0.800) dimensions are in millimeters (inches). all dimensions are 0.025 mm unless otherwise specified. 9.8 (0.386) max. +0.1 -0.05 0.25 +0.004 -0.002 ( 0.010 3.3 0.38 (0.130 0.015) ) 20.32 (0.80) slot width 4.7 (0.185) 23.8 (0.937) +0.25 -0.05 0.46 +0.010 -0.002 ( 0.018 ) 9x ? 1.3 (0.051) 2x ? 15.8 0.15 (0.622 0.006) +0.25 -0.05 1.27 +0.010 -0.002 ( 0.050 ) 2x ? 2.0 0.1 (0.079 0.004) 29.6 (1.16) key: yyww = date code for multimode module: xxxx-xxxx = afbr-53xx zzzz = 850 nm 8x 2.54 (0.100) 10.2 (0.40) 1.3 (0.05) max. 2.09 (0.08) uncompressed uncompressed xxxx-xxxx zzzzz laser prod 21cfr(j) class 1 country of origin yyww tx rx a a
13 figure 7. suggested module positioning and panel cut-out for AFBR-53D5EZ. 27.4 0.50 (1.08 0.02) 9.4 (0.37) 6.35 (0.25) pcb bottom view module protrusion 2x 0.8 (0.032) +0.5 -0.25 10.9 +0.02 -0.01 ( 0.43 ) 2x 0.8 (0.032) a
14 figure 8. package outline for afbr-53d5fz. 39.6 (1.56) max. area reserved for process plug 12.7 (0.50) 25.4 (1.00) max. 20.32 (0.800) 20.32 (0.800) dimensions are in millimeters (inches). all dimensions are 0.025 mm unless otherwise specified. +0.1 -0.05 0.25 +0.004 -0.002 ( 0.010 3.3 0.38 (0.130 0.015) ) 20.32 (0.800) 2.2 (0.09) slot depth 23.8 (0.937) +0.25 -0.05 0.46 +0.010 -0.002 ( 0.018 ) 9x ? 1.3 (0.051) 2x ? 15.8 0.15 (0.622 0.006) +0.25 -0.05 1.27 +0.010 -0.002 ( 0.050 ) 2x ? 14.4 (0.57) 29.7 (1.17) 12.7 (0.50) slot width 4.7 (0.185) 2.0 0.1 (0.079 0.004) key: yyww = date code for multimode module: xxxx-xxxx = afbr-53xx zzzz = 850 nm 25.8 (1.02) max. 22.0 (0.87) 8x 2.54 (0.100) area reserved for process plug 9.8 (0.386) max. 10.2 (0.40) max. xxxx-xxxx zzzzz laser prod 21cfr(j) class 1 country of origin yyww tx rx 1.01 (0.40) a a
figure 9. suggested module positioning and panel cut-out for afbr-53d5fz. 10.82 (0.426) 26.4 (1.04) 1.98 (0.078) 13.82 (0.544) 30.2 (1.19) 14.73 (0.58) keep out zone bottom side of pcb dimension shown for mounting module flush to panel. thicker panel will recess module. thinner panel will protrude module. 12.0 (0.47) 0.36 (0.014) 1.27 (0.05) optional septum dimensions are in millimeters (inches). all dimensions are 0.025 mm unless otherwise specified. a ordering information 850 nm vcsel (sx C short wavelength laser) afbr-53d5z no shield, plastic housing. AFBR-53D5EZ extended/protruding shield, plastic housing. afbr-53d5fz flush shield, plastic housing. for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. data subject to change. copyright ? 2005-2012 avago technologies. all rights reserved. obsoletes 5989-2172en v02-0457en - april 23, 2012

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